Robert Triggs / Android Authority
- Google has announced that it will support the RISC-V architecture.
- This is an alternative computing architecture to Arm, which powers virtually all smartphones.
Android only supports two computing architectures right now, namely Arm and x86. The former architecture is used in chips powering smartphones, most tablets, smartwatches, and TV boxes. Meanwhile, the x86 architecture is used in chips that power most PCs.
Android for RISC-V is here (kinda)
Google announced the news at the RISC-V Summit last month, with engineering director Lars Bergstrom noting that AOSP (Android Open Source Project) for RISC-V will be 64-bit only. This is in line with Google’s long-term plan for Android at large, as the company’s own Pixel 7 devices shipped without 32-bit support by default.
The search colossus is aiming to have initial emulator support for developers by the beginning of the year, with Android RunTime (ART) support for Java workloads during Q1 2023.
“Android is really a Java system. All of the user interface is done in Java, most of the system services, all of the communication, even native apps sit on top of some Java most of the time,” Bergstrom explained. So ART support should open the doors for more consumer-facing features in Android for RISC-V, such as apps and a proper user interface.
The Google representative also posted a list of upcoming Android for RISC-V features (seen above), albeit without committing to specific timelines for each feature.
This isn’t the first time we’ve seen Android on an architecture that wasn’t Arm or x86, though. The platform supported the MIPS architecture too before this was deprecated in 2018. Nevertheless, Bergstrom acknowledged that Google wants Android on RISC-V to be something “that’s really singing” on the hardware rather than a mere prototype.
Why does this matter?
The biggest selling point for RISC-V is that it’s an open-source architecture, unlike both Arm and x86. That means anyone can design and produce RISC-V chips. By comparison, companies wanting to design and produce Arm-based chips (such as Qualcomm and Mediatek) generally need to pay for a license from Arm itself.
This open-source approach also means companies producing RISC-V chips don’t need to eat the cost of licensing the architecture or pass this cost on to consumers or device makers. This could theoretically make for cheaper devices compared to Arm.
Would you buy a RISC-V Android phone?
The news also comes amid a rather rocky time for Arm itself. Nvidia abandoned its $40 billion deal to buy Arm in February 2022, citing “significant regulatory challenges.” Arm would go on to file a lawsuit against Qualcomm in September in the wake of Qualcomm acquiring chip company Nuvia. Qualcomm reportedly claimed in turn that Arm plans to stop licensing its silicon designs to chipmakers and would only license them to device manufacturers instead.
So Android’s fledgling support for RISC-V means chipmakers and device manufacturers could have a viable alternative to Arm if they feel the architecture holder is playing hardball.
Don’t expect a RISC-V phone from major OEMs just yet
Robert Triggs / Android Authority
Despite the news of initial Android support for RISC-V, it’s worth stressing that a RISC-V smartphone running Android is still a way off for now. Google will need to implement the aforementioned features and plenty of other capabilities first. This is in addition to Google and other developers optimizing their apps for the upstart architecture.
In saying so, it’s clear that RISC-V processors are powerful enough to run Android on paper but still a step behind the best Arm-based chipsets on the market. At the 2021 RISC-V Summit, chipmaker SiFive said its P650 processor had similar performance to Arm’s Cortex-A77 CPU. But the company’s latest P670 processor is reportedly in the same performance ballpark as Arm’s Cortex-A78 CPU. It’s worth noting that the Cortex-A77 was found inside 2020’s flagship mobile chipsets while the Cortex-A78 was used as the medium core in 2021’s high-end smartphone processors.